By D. Agnew, L. Claesen, R. Camposano
Description languages (HDLs) have tested themselves as one of many primary technique of designing digital structures. The curiosity in and utilization of HDLs maintains to unfold speedily, pushed via the expanding complexity of structures, the expansion of HDL-driven synthesis, the study on formal layout tools and lots of different similar advances.
This research-oriented book goals to make a powerful contribution to additional advancements within the box. the subsequent subject matters are explored intensive: BDD-based procedure layout and research; approach point formal verification; formal reasoning on undefined; languages for protocol specification; VHDL; HDL-based layout equipment; excessive point synthesis; and text/graphical HDLs. There are brief papers masking complicated layout trap and up to date paintings in excessive point synthesis and formal verification. furthermore, numerous invited shows on key concerns speak about and summarize fresh advances in actual time process layout, automated verification of sequential circuits and languages for protocol specification
Read or Download Computer Hardware Description Languages and their Applications. Proceedings of the 11th IFIP Wg10.2 International Conference on Computer Hardware Description Languages and their Applications–Chdl'93, Ottawa, Ontario, Canada, 26–28 April, 1993 PDF
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Extra info for Computer Hardware Description Languages and their Applications. Proceedings of the 11th IFIP Wg10.2 International Conference on Computer Hardware Description Languages and their Applications–Chdl'93, Ottawa, Ontario, Canada, 26–28 April, 1993
R . B u r c h , E . M . L. L. J. H w a n g : Model Checking: 10 20 States and Beyond," LICS'90: "Symbolic 5th Annual IEEE S y m p o s i u m o n L o g i c i n C o m p u t e r S c i e n c e , J u n e 1990, p p . 4 2 8 - 4 3 9 [BCMD90b] J . R . B u r c h , E . M . C l a r k e , D . D i l l , K . L . M c M i l l a n : " S e q u e n t i a l C i r c u i t Verification Using Symbolic Model Checking," D A C ' 9 0 : 27th A C M / I E E E Design A u t o m a t i o n C o n f e r e n c e , O r l a n d o , F L ( U S A ) , J u n e 1990, p p .
G o d s k e s e n , K . G . L a r s e n , M . Z e e b e r g : " T A V ( T o o l s for A u t o m a t i c Veri f i c a t i o n ) U s e r s M a n u a l , " D e p t . R. Hoare: " C o m m u n i c a t i n g Sequential Processes," Prentice Hall, En- g l e w o o d Cliffs, N J ( U S A ) , 1985 [Koha70] Z. K o h a v i : " S w i t c h i n g a n d f i n i t e a u t o m a t a t h e o r y , " C o m p u t e r S c i e n c e Ser i e s , M c G r a w H i l l , N e w Y o r k , N Y ( U S A ) , 1970 [Koom91] C . J .
A t t h i s s t a g e t h e e x a c t set 5 5 of b i s i m i l a r c o u p l e s is k n o w n : x ( s i , s 2 ) = X f c ( i , 2 ) 4. T h e t w o a g e n t s a r e s t r o n g l y b i s i m i l a r if a n d o n l y if χ ( Α ? , R2) i n i t i a l s t a t e s of t h e t w o a g e n t s a r e b i s i m i l a r . Weak bisimulation is t r u e , t h a t is if t h e T h e p r o c e d u r e for w e a k b i s i m u l a t i o n is i d e n t i c a l t o t h a t for s t r o n g b i s i m u l a t i o n , p r o v i d e d t h a t all t r a n s i t i o n r e l a t i o n s R a r e s u b s t i t u t e d w i t h t h e i r r - c l o s u r e T Ä , w h i c h is c o m p u t e d as follows: 1.