By Rene van Leuken, Reinder Nouta, Alexander de Graaf (auth.), Dimitrios Soudris, Peter Pirsch, Erich Barke (eds.)
This ebook constitutes the refereed court cases of the tenth foreign Workshop on energy and Timing Modeling, Optimization and Simulation, PATMOS 2000, held in Göttingen, Germany in September 2000.
The 33 revised complete papers awarded have been conscientiously reviewed and chosen for inclusion within the publication. The papers are prepared in sections on RTL strength modeling, strength estimation and optimization, system-level layout, transistor point layout, asynchronous circuit layout, strength effective applied sciences, layout of multimedia processing functions, adiabatic layout and mathematics modules, and analog-digital circuit modeling.